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Tae-Kyu Lee, PhD

Tae-Kyu Lee is a Technical leader in Cisco Systems, Component quality and technology (CQT) group, Packaging and Interconnect Technology Team located in San Jose, CA. Before joining Cisco, he was an associate professor in Portland State University. His research interests are on microelectronics interconnect material and reliability, next generation advanced packaging technology, high deposition rate metal additive manufacturing, macro to micro joining technology and material characterizations. Tae-Kyu received his Ph.D. degree in Materials Science and engineering from University of California, Berkeley on studies related to high temperature Superconducting Quantum Interference Device (SQUID) non-destructive evaluation and was a Postdoctoral fellow in Lawrence Berkeley National Laboratory. He is actively involved in several industry consortia and as a lead organizer for the Lead free solder technology workshop, , and serving as a Chair in the Electronic Packaging and Interconnect Technology Committee in TMS. He is also serving as a section editor in Journal of Electronic Materials.
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Education

 

Ph.D.    University of California, Berkeley, Materials Science and Engineering, 2004

Dissertation title: Fatigue damage evolution study with non-destructive magnetic measurement method using scanning SQUID microscopy

M.S.     Inha University, Incheon, Korea, Metallurgical Engineering, 1996

B.A.     Inha University, Incheon, Korea, Metallurgical Engineering, 1994

 

 

Professional Position

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  • 2021-current   Technical Leader, Component Quality and Technology Group, Technology and Quality                                                Group, Cisco Systems Inc., San Jose

  • 2015-2021      Associate Professor, Department of Mechanical and Materials Engineering, Portland State                                          University, Portland, OR

  • 2008-2015      Manufacturing Engineer, Component Quality and Technology Group, Technology and Quality                                    Group, Cisco Systems Inc., San Jose

  • 2006-2008      Reliability Engineer, Component Quality and Technology Group, Technology and Quality Group,                               Cisco Systems Inc., San Jose

  • 2004-2006      Post-Doctoral Fellow, University of California, Berkeley, Department of Materials Science and                                   Engineering

  • 1999-2004      Graduate Student Researcher, Materials Science Division, Lawrence Berkeley National Laboratory,                           Berkeley

  • 1998-1999      Researcher, Precision Welding and Characterization Division, Korea Institute of Industrial                                           Technology (KITECH), Chonan, Korea

 

 

Professional Activities

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  • TMS EPIM (Electro packaging and interconnect materials committee) Committee chair (2017-2020)

  • Journal of Electronic Materials (JEMS) Section Editor (2019-current)        

  • Journal of Electronic Materials (JEMS) Associate Editor (2013-2018) 

  • TMS Functional Material Division (FMD) council member (2014-current)

  • Lead organizer of 15th Advanced Packaging and Pb-free solder technology Workshop, San Antonio, TX, March 10, 2019

  • Lead organizer for 2019 MS&T (International conference on Material Science and Technology), Portland (OR), September 29 – October 3, 2019

  • Co–organizer for Advanced Microelectronic Packaging, Emerging interconnection Technology and Pb-free solder symposium in TMS2019 annual meeting in San Antonio, TX, March 10-14, 2019

  • Co-organizer of 12th,13th and 14th Advanced Packaging and Pb-free solder technology Workshop (2016, 2017, 2018)

  • Co-organizer, Frontiers in Materials Science, Engineering, Technology: An FMD Symposium in Honor of Sungho Jin (TMS2017)

  • Reviewed 125 Journal papers including three NSF CMMI and NSF DMR proposals on micro-interconnect and Sn whisker.

  • Technical board member, IEEE Component Packaging and Manufacturing Technology (CPMT) society Oregon Chapter, since 2019

  • Surface mounting technology association (SMTA) since 2010 and Editorial Board member, Journal of SMT, since 2019

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Areas of Specializations

 

Interconnection in Advanced packaging and Electronic Materials

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  • Interconnection (microbump, solderbump, solder joint, TSV, and PCB via) long-term reliability, electromigration and interconnect metallurgy and microstructure analysis using new analytical methodology

  • Solder alloy stability assessment including low melting temperature solder and Cu core joints

  • Microalloying effect (In, Ag, Al, Cu, Ni etc.) on Sn base solder: Fundamentals and Phase transformation

  • Thermal cycling, mechanical bending, dynamic shock, corrosion and high temperature environment effect in-depth mechanism study and understanding

  • Interconnect reliability at cryogenic temperature and high current stressing

  • 2.5D interposer interconnect stress/strain analysis via EBSD

  • Surface finish affect and interface stability assessment and analysis

  • 3D interconnection and through-silicon via (TSV) reliability

  • DIMM press-pit connector reliability and PCB material behavior

  • Collaboration with various material and packaging suppliers

  • Test vehicle design, testing and analysis

 

Macro-joining of materials and manufacturing process

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  • Additive manufacturing based on high deposition rate cold metal transfer (CMT) wire-arc AM

  • Welding materials and materials characterization in structural steel materials (including phase transformations)

  • Non-destructive characterization (SQUID) and Failure analysis and Powder metallurgy and Cryogenic mechanical testing

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